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| High Power 3P3T Switch with Logic Control CXG1210UR Description This IC can be used in wireless communication systems, for example, CDMA EV-DO handsets. The IC has on-chip logic for operation with 3 CMOS control inputs. The Sony JPHEMT process is used for low insertion loss and on-chip logic circuit. (Applications: Antenna switch for cellular handsets, CDMA, EVDO) Features Low insertion loss: 0.3dB@900MHz 3 CMOS compatible control line Package Small package size: 20-pin UQFN Structure GaAs JPHEMT MMIC Absolute Maximum Ratings (Ta = 25C) Bias voltage Control voltage Operating temperature Storage temperature RF input power VDD Vctl Topr Tstg 7 5 -35 to +85 -60 to +150 V V C C Pin = 37dBm This IC is ESD sensitive device. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E05517 CXG1210UR Block Diagram and Recommended Circuit RF4 (Main-Ant) CRF GND GND RF1 (CDMA1) CRF GND 7 6 GND RF3 (GPS) 4 CRF F10 3 GND RF2 (CDMA2) F9 2 CRF 1 GND 10 GND4 RF5 (Ext) 12 CRF GND 13 F13 14 F12 F11 9 8 11 F1 F2 F7 F6 F5 F3 F4 F8 5 GND6 RF6 (Sub-Ant) 15 CRF 16 GND Cbypass (100pF) 17 VDD 18 CTLA 19 CTLB 20 CTLC F5 F6 When using this IC, the following external components should be used: CRF: This capacitor is used for RF decoupling and must be used for all applications. Cbypass: This capacitor is used for DC line filtering. Truth Table State CTLA CTLB CTLC 1 2 3 4 5 6 7 8 L L H H L L H H L L L L H H H H L H L H L H L H Mode CDMA1 Ext ON state F1 F2 F3 F4 F7 F8 F9 F10 F11 F12 F13 ON ON OFF ON RF1 - RF5 OFF ON OFF OFF OFF OFF OFF OFF ON CDMA1 Ext RF1 - RF5 OFF ON ON OFF OFF OFF OFF OFF OFF ON ON OFF OFF CDMA2 Sub RF2 - RF6 CDMA1 Main RF1 - RF4 ON OFF OFF OFF OFF OFF OFF OFF ON ON OFF ON ON CDMA1 Main RF1 - RF4 ON OFF ON OFF OFF OFF OFF OFF OFF ON OFF ON OFF CDMA2 Sub RF2 - RF6 GPS Ext CDMA2 Ext GPS Main GPS Sub RF3 - RF5 OFF OFF OFF OFF OFF OFF ON ON ON OFF ON OFF ON RF2 - RF5 OFF OFF OFF ON OFF OFF OFF ON OFF ON ON OFF ON RF3 - RF4 OFF OFF OFF OFF ON OFF OFF ON ON OFF OFF ON ON RF3 - RF6 OFF OFF OFF OFF OFF ON OFF ON ON OFF ON ON OFF -2- CXG1210UR DC Bias Conditions (Ta = 25C) Item Vctl (H) Vctl (L) VDD Min. 2.0 0 2.6 Typ. 2.85 -- 2.85 Max. 3.2 0.5 3.2 Unit V V V Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 GND RF2 (CDMA2) GND RF3 (GPS) GND GND RF1 (CDMA1) GND GND RF4 (Main-Ant) Symbol Pin No. 11 12 13 14 15 16 17 18 19 20 Symbol GND4 RF5 (EXT) GND GND6 RF6 (Sub-Ant) GND VDD CTLA CTLB CTLC -3- CXG1210UR Electrical Characteristics (Ta = 25C, VDD = 2.85V) Item Symbol Condition 900MHz Insertion loss IL 1.5GHz 1.9GHz 900MHz Isolation ISO. 1.5GHz 1.9GHz VSWR VSWR 2fo Harmonics 3fo 50 *1 *3 *1 *3 *2 Min. Typ. 0.30 0.40 0.50 Max. 0.55 0.65 0.75 Unit dB dB dB dB dB dB -- 18 15 12 30 30 25 1.2 -75 -75 -75 -75 -60 -60 -60 -60 dBc dBc dBc dBc dBm dBm dBm s A A Input IP3 1dB compression input power Switching speed Bias current Control current *1 *2 *3 *4 IIP3 P1dB TSW IDD Ictl 55 55 65 65 32 4 10 420 30 *4 VDD = 2.85V VDD = 2.85V Vctl (H) = 2.85V 300 15 Pin = 25dBm, 0/2.85V control, VDD = 2.85V, 900MHz Pin = 25dBm (900MHz) + 25dBm (901MHz), 0/2.85V control, VDD = 2.85V Pin = 25dBm, 0/2.85V control, VDD = 2.85V, 1.9GHz Pin = 25dBm (1.9GHz) + 25dBm (1.901GHz), 0/2.85V control, VDD = 2.85V -4- CXG1210UR Package Outline (Unit: mm) 20PIN UQFN (PLASTIC) x4 0.1 0.55 0.05 2.7 15 16 11 10 2.7 A 0.4 0.1 1.3 S A-B C 4-R0.3 C B 20 1 PIN 1 INDEX 5 6 0.4 0.18 0.07 0.25 0.05 M S A-B C 0.14 0. 26 0.05 S S Solder Plating + 0.09 0.14 - 0.03 + 0.09 0.25 - 0.03 MAX0.02 5-18m S TERMINAL SECTION Note:Cutting burr of lead are 0.05mm MAX. SONY CODE EIAJ CODE JEDEC CODE UQFN-20P-01 PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.02g LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% -5- Sony Corporation |
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